"There are many circumstances in which a sample clock
must be derived from an external source. In a digital audio
recorder or a digital surround processor, for example, the
sample clock controlling the DAC is extracted from the input
data stream. In other applications the sample clock of an
ADC might need to be locked to an external sync signal, or
a digital data stream might need to be resynchronized to a
different clock reference using an asynchronous sample rate
converter (ASRC).
This external clock source may well have jitter, but that,
by definition, is not sampling jitter. The external source
might make a contribution to the sample clock jitter, but that
contribution depends on the characteristics of the clock
recovery circuit (or numerical algorithm) between the
external source connection and the actual (or virtual)
sample clock. This will have intrinsic jitter, jitter attenuation,
and jitter non-linearities in its behavior."
